17static void SX1272_writeRegister(
SX1272_t *, uint8_t, uint8_t);
59 _SX1272_setMode(lora, SX1272_MODE_SLEEP);
62 uint8_t opMode = SX1272_readRegister(lora, SX1272_REG_OP_MODE);
63 SX1272_writeRegister(lora, SX1272_REG_OP_MODE, opMode | SX1272_OP_MODE_LONG_RANGE);
65 _SX1272_setMode(lora, SX1272_MODE_STDBY);
67 uint32_t frf = (config->
freq * (0x01 << 19)) / 32.0f;
68 SX1272_writeRegister(lora, SX1272_REG_FR_LSB, frf >> 0);
69 SX1272_writeRegister(lora, SX1272_REG_FR_MIB, frf >> 8);
70 SX1272_writeRegister(lora, SX1272_REG_FR_MSB, frf >> 16);
74 SX1272_writeRegister(lora, SX1272_REG_MODEM_CONFIG1,
75 config->
bw << SX1272_MODEM_CONFIG1_BW_Pos
76 | config->
cr << SX1272_MODEM_CONFIG1_CR_Pos
77 | (config->
implicitHeader ? SX1272_MODEM_CONFIG1_IMPLICIT_HEADER : 0)
78 | (config->
crc ? SX1272_MODEM_CONFIG1_CRC : 0)
82 SX1272_writeRegister(lora, SX1272_REG_MODEM_CONFIG2,
83 (config->
sf << SX1272_MODEM_CONFIG2_SF_Pos) | SX1272_MODEM_CONFIG2_AGC_AUTO_ON
87 SX1272_writeRegister(lora, SX1272_REG_MAX_PAYLOAD_LENGTH, config->
maxPayloadLength);
90 SX1272_writeRegister(lora, SX1272_REG_FIFO_TX_BASE_ADDR, config->
txFifoBaseAddr);
91 SX1272_writeRegister(lora, SX1272_REG_FIFO_RX_BASE_ADDR, config->
rxFifoBaseAddr);
94 SX1272_writeRegister(lora, SX1272_REG_OCP,
95 (config->
ocp ? SX1272_OCP_ON : 0)
100 SX1272_writeRegister(lora, SX1272_REG_PA_CONFIG,
101 (config->
paSelect ? SX1272_PA_SELECT : 0)
106 SX1272_writeRegister(lora, SX1272_REG_PA_DAC, 0x87);
108 uint8_t RegPll = SX1272_readRegister(lora, 0x5C);
111 SX1272_writeRegister(lora, 0x5C, RegPll);
113 uint8_t RegTcxo = SX1272_readRegister(lora, 0x58);
115 SX1272_writeRegister(lora, 0x58, RegTcxo);
117 SX1272_writeRegister(lora, 0x0A, 0x09);
133 uint8_t regOpMode = SX1272_readRegister(lora, SX1272_REG_OP_MODE);
142 case SX1272_MODE_RXCONTINUOUS:
151 SX1272_writeRegister(lora, SX1272_REG_OP_MODE, regOpMode);
168 _SX1272_setMode(lora, SX1272_MODE_STDBY);
183 _SX1272_setMode(driver, SX1272_MODE_STDBY);
186 SX1272_writeRegister(driver, SX1272_REG_PAYLOAD_LENGTH, length);
191 SX1272_writeRegister(driver, SX1272_REG_DIO_MAPPING1, SX1272_LORA_DIO_TXDONE);
205 SX1272_writeRegister(driver, SX1272_REG_IRQ_FLAGS, SX1272_LORA_IRQ_TXDONE);
206 SX1272_writeRegister(driver, SX1272_REG_FIFO_ADDR_PTR, 0x00);
208 for (
int i = 0; i < length; i++) {
209 SX1272_writeRegister(driver, SX1272_REG_FIFO, pointerdata[i]);
213 _SX1272_setMode(driver, SX1272_MODE_TX);
227 _SX1272_setMode(driver, SX1272_MODE_STDBY);
232 SX1272_writeRegister(driver, SX1272_REG_DIO_MAPPING1, SX1272_LORA_DIO_RXDONE);
246 SX1272_writeRegister(driver, SX1272_REG_FIFO_ADDR_PTR, 0x00);
249 _SX1272_setMode(driver, SX1272_MODE_RXCONTINUOUS);
275 SX1272_writeRegister(driver, SX1272_REG_IRQ_FLAGS, SX1272_LORA_IRQ_RXDONE);
278 uint8_t bytesReceived = SX1272_readRegister(driver, SX1272_REG_RX_BYTES);
279 uint8_t rxCurrentAddr = SX1272_readRegister(driver, SX1272_REG_FIFO_RX_CURR_ADDR);
282 if (bytesReceived > buffSize)
286 SX1272_writeRegister(driver, SX1272_REG_FIFO_ADDR_PTR, rxCurrentAddr);
287 for (
int i = 0; i < bytesReceived; i++) {
288 buffer[i] = SX1272_readRegister(driver, SX1272_REG_FIFO);
291 return bytesReceived;
306 SX1272_writeRegister((
SX1272_t *)lora, SX1272_REG_IRQ_FLAGS, flags);
321 if (config == NULL) {
322 config = &SX1272_CONFIG_DEFAULT;
333 _SX1272_init(lora, config);
341uint8_t SX1272_readRegister(
SX1272_t *lora, uint8_t address) {
342 uint8_t response = 0;
350 uint8_t payload = address & 0x7F;
351 response = spi->
transmit(spi, payload);
352 response = spi->
transmit(spi, 0xFF);
360void SX1272_writeRegister(
SX1272_t *lora, uint8_t address, uint8_t data) {
368 uint8_t payload = address | 0x80;
void(* transmit)(struct LoRa *, uint8_t *, uint8_t)
LoRa transmit method.
LoRa_Mode currentMode
Current operating mode.
uint8_t(* readReceive)(struct LoRa *, uint8_t *, uint8_t)
LoRa receive buffer read method.
void(* startReceive)(struct LoRa *)
LoRa continuous receive method.
void(* clearIRQ)(struct LoRa *, uint8_t)
LoRa IRQ clear method.
void(* set)(struct GPIOpin *)
void(* reset)(struct GPIOpin *)
Struct definition for a GPIO pin.
SX1272_CodingRate cr
SX1272 LoRa modem coding rate.
uint8_t ocpTrim
SX1272 LoRa modem overcurrent protection trim.
SX1272_Config config
Configuration parameters for the SX1272 driver.
void(* standby)(struct SX1272 *)
SX1272 standby method.
float freq
SX1272 LoRa carrier frequency.
SX1272_SpreadingFactor sf
SX1272 LoRa modem spreading factor.
GPIOpin_t cs
Chip select GPIO.
LoRa_t base
Base LoRa API.
uint8_t rxFifoBaseAddr
Base address for RX fifo.
bool ocp
SX1272 LoRa modem overcurrent protection enable.
bool(* updateConfig)(struct SX1272 *, SX1272_Config *)
SX1272 configuration update method.
bool paSelect
SX1272 LoRa modem power amp output select.
uint8_t outputPower
SX1272 LoRa modem power amp output power.
bool implicitHeader
SX1272 LoRa modem implicit header enable.
uint8_t txFifoBaseAddr
Base address for TX fifo.
SX1272_Mode currentMode
Current operating mode.
SX1272_Bandwidth bw
SX1272 LoRa modem bandwidth.
SPI_t * spi
Parent SPI interface.
bool crc
SX1272 LoRa modem CRC enable.
uint8_t maxPayloadLength
Maximum allowed length of payload.
uint16_t(* transmit)(struct SPI *, uint16_t)
SPI transmit method.
Struct definition for SPI interface. Provides the interface for API consumers to interact with the SP...
void SX1272_startReceive(LoRa_t *lora)
Begins continuous receive on the SX1272.
uint8_t SX1272_readReceive(LoRa_t *lora, uint8_t *data, uint8_t byffSize)
Reads contents of received packet to local buffer from the SX1272.
void SX1272_transmit(LoRa_t *lora, uint8_t *data, uint8_t length)
Transmits data using the SX1272.
bool SX1272_updateConfig(SX1272_t *lora, SX1272_Config *config)
Update SX1272 configuration.
SX1272_Mode
SX1272 operating mode enum.
void SX1272_standby(SX1272_t *)
Sets the operational mode of the LoRa module to standby.
bool SX1272_init(SX1272_t *lora, SPI_t *spi, GPIOpin_t cs, SX1272_Config *config)
Initializes the LoRa module with specified configuration parameters.
void SX1272_clearIRQ(LoRa_t *, uint8_t)
Sets the value of RegIrqFlags in the SX1272 to the provided argument value. Writing a 1 to a bit in t...
SX1272 LoRa configuration struct.
Struct definition for SX1272. Provides the interface for API consumers to interact with the SX1272 Lo...